| Publisher | Tampere University of Technology | ||
|---|---|---|---|
| Format | 873.4KB PDF | Date added | 20 Dec 2006 |
| Topics | Processors, UML | ||
| Downloads | 12 | ||
The paper presents a novel scheme of dynamic power management for UML modeled applications that are executed on a multiprocessor System-on-Chip (SoC) in a distributed manner. The UML models for both application and architecture are designed according to a well-defined UML profile for embedded system design, called TUT-Profile. Application processes are considered as elementary units of distributed execution, and their mapping on a multiprocessor SoC can be dynamically changed at run-time. The approach on the dynamic power management balances utilized processor resources against current workload at runtime by observing the processor and workload statistics, re-evaluating the amount of required resources (i.e. the number of active processors), and re-mapping the application processes to the minimum set of active processors.
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