| Publisher | Atific | ||
|---|---|---|---|
| Format | 1.6MB PDF | Date added | 01 May 2006 |
| Topics | Processors, Mobile - Wireless Communications, High Performance Computing | ||
| Downloads | 1 | ||
This white paper presents the design and implementation of a high performance multi-radio Wireless Sensor Network (WSN) platform. The evaluation of multiprocessor architectures is supported by extremely flexible and fully re-configurable FPGA processing hardware. The use of four parallel radio transceivers with 83 selectable frequency channels allows the development of communication protocols with high interference tolerance, low latency and high mesh-networking performance. Purely simultaneous data exchanges with several neighbors are possible. As a design case multi-processor implementations for 1 to 4 parallel Nios II softcore processors with performance measurements are presented. In addition, two design cases achieving ultra low latency and high network throughput employing up to four radio transceivers are presented.
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