| Publisher | Stanford University | ||
|---|---|---|---|
| Format | 139.1KB PDF | Date added | 03 Mar 2004 |
| Topics | Load Balancing, Switching | ||
| Downloads | 0 | ||
The load-balanced switch architecture is a promising way to scale router capacity. It requires no centralized scheduler, requires no memory operating faster than the line-rate, and can be built using a fixed, optical mesh. This paper explains how to prevent packet mis-sequencing and provide 100% throughput for all traffic patterns, and describes the design of a 100Tb/s router using technology available within three years. But there is one major problem with the load-balanced switch that makes the basic mesh architecture impractical: Because the optical mesh must be uniform, the switch does not work when one or more linecards is missing or has failed.
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