| Publisher | Institute of Electrical and Electronics Engineers | ||
|---|---|---|---|
| Format | 667.7KB PDF | Date added | 01 Sep 2006 |
| Topics | Processors, Parallel Processing | ||
| Downloads | 16 | ||
In this paper, a pixel-parallel image sensor/processor architecture with a fine-grain massively parallel SIMD analogue processor array is overviewed and the latest VLSI implementation, SCAMP-3 vision chip, comprising 128 × 128 array, fabricated in a 0.35µm CMOS technology, is presented. Examples of real-time image-processing executed on the chip are shown. Sensor-level data reduction, wide dynamic range and adaptive sensing algorithms, enabled by the sensor-processor integration, are discussed.
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