| Publisher | Institute of Electrical and Electronics Engineers | ||
|---|---|---|---|
| Format | 2.1MB PDF | Date added | 01 Dec 2005 |
| Topics | Memory Components, Processors, High Performance Computing | ||
| Downloads | 5 | ||
High-performance, out-of-order execution processors spend a significant portion of their execution time on the incorrect program path even though they employ aggressive branch prediction algorithms. Although memory references generated on the wrong path do not change the architectural state of the processor, they affect the arrangement of data in the memory hierarchy. This paper examines the effects of wrong-path memory references on processor performance. It is shown that these references significantly affect the IPC (Instructions Per Cycle) performance of a processor. Not modeling those leads to errors of up to 10 percent (4 percent on average) in IPC estimates for the SPEC CPU2000 integer benchmarks on an out-of-order processor and errors of up to 63 percent on a runahead-execution processor.
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