| Publisher | University of Texas | ||
|---|---|---|---|
| Format | 77.0KB PDF | Date added | 08 May 2007 |
| Topics | Memory Components, Processors | ||
| Downloads | 64 | ||
High-performance processors employ aggressive speculation and prefetching techniques to increase performance. Speculative memory references caused by these techniques sometimes bring data into the caches that are not needed by correct execution. This paper proposes the use of the first-level caches as filters that predict the usefulness of speculative memory references. With the proposed technique, speculative memory references bring data only into the first-level caches rather than all levels in the cache hierarchy. The processor monitors the use of the cache blocks in the first-level caches and decides which blocks to keep in the cache hierarchy based on the usefulness of cache blocks.
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