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Processors Toolkit

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Optimization of Silicon Technology for the IBM System z9

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24 out of 50 users found this white paper useful


Publisher IBM
Publisher Registration N/A
Topics Embedded Microprocessors, Mainframes, ASICs - Chip Sets Date added 13 Feb 2007
Downloads 7 Format 839.1KB PDF

IBM 90-nm Silicon-On-Insulator (SOI) technology was used for the key chips in the System z9 processor chipset. Along with system design, optimization of some critical features of this technology enabled the z9 to achieve double the system performance of the previous generation. These technology improvements included logic and SRAM FET optimization, mask fabrication, lithography and wafer processing, and interconnect technology. Reliability improvements such as SRAM optimization and burn-in reliability screen are also described.

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