| Publisher | Fujitsu | ||
|---|---|---|---|
| Format | 148.3KB PDF | Date added | 01 Apr 2006 |
| Topics | Wi-Fi (802.11), Mobile - Wireless Communications | ||
| Downloads | 124 | ||
Reconfigurable processor technology offers a way to couple significant hardware performance improvements with realtime software signal processing. This technology enables Software-Defined Radio (SDR) to be realized on a System-on-a-Chip (SoC) platform. This paper describes an SDR SoC LSI that is suitable for use in programmable wireless communication systems. The LSI has two advanced features. First, the hybrid architecture consists of reconfigurable signal processors and accelerator circuits. These accelerators are parametric circuits essential for baseband processing. Second, the reconfigurable processing elements have a cluster structure that improves the mapping efficiency and minimizes the processing time. The paper also describes a prototype SDR system that uses this LSI to perform software-defined IEEE802.11a and 11b communications.
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