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Data Aggregation Architectures for Single-Chip SDH/SONET Framers

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21 out of 41 users found this white paper useful


Publisher IBM
Publisher Registration Direct Access
Topics Optical Networking Date added 01 Mar 2003
Downloads 11 Format 132.1KB PDF, requires Acrobat Rdr 5

In this paper, Single-chip SDH/SONET framer architectures are described that permit data aggregation from several line ports. After presenting an overview of the usual parallel approach and an extension thereof that exploits distributed algorithms, this paper introduces a novel data-multiplexing architecture that should be suitable for accommodating data from a relatively large number of ports in a single device. In combination with the new virtual concatenation feature of SDH/SONET, this architecture should also allow transport of data from high-bandwidth applications over multiple wavelengths or multiple fibers.

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21 out of 41 users found this white paper useful


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