| Publisher | George Mason University | ||
|---|---|---|---|
| Format | 118.9KB PDF, requires Acrobat Rdr 5 | Date added | 05 Oct 2004 |
| Topics | Graphics Components, IP Technologies, Monitors and Displays | ||
| Downloads | 3 | ||
Bandwidth-intensive applications compete directly with the operating system's network stack for CPU cycles. This is particularly true when the stack performs security protocols such as IPsec; the additional load of complex cryptographic transforms overwhelms modern CPUs when data rates exceed 100 Mbps. This paper describes a network-processing accelerator, which overcomes these bottlenecks by offloading packet processing, and cryptographic transforms to an intelligent interface card.
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