Performance evaluation of parallel applications on an HPC machine is complicated. To model the single processor performance of an application, the following are measured: bandwidth and latency of data storing and loading into the memory hierarchy (main memory, caches), and the performance of total floating points and memory operations. Communication performance is evaluated by measuring the communication bandwidth and latency on and of nodes, and the percentage of communication required to distribute and gather data in a parallel application. This paper describes the performance measurements of our SMP POWER4 machines p690 and p655 using the PMaC benchmark suite.
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