| Publisher | Motorola | ||
|---|---|---|---|
| Format | HTML | Date added | 05 May 2003 |
| Topics | Microprocessors, Windows NT - 2000 - 2003, Memory Components | ||
| Downloads | 20 | ||
On multiprocessor architectures with shared memory models, such as Intel Itanium-based architectures, read and write operations are not always executed in the same order, as seen from the point of view of different processors. This paper describes situations in which drivers must use locking routines and memory barriers to enforce the order of operations on such architectures. This paper is for developers of kernel-mode drivers that run on multiprocessor systems. The information in this paper applies to the Microsoft Windows family of operating systems.
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