Boundary scan design is a design for testability technique to simplify the application of test patterns for the detection and diagnosis of different faults at levels of packages (e.g. chips, modules, boards, backplanes). In-circuit test based on the bed-of-nails probing technique makes it possible to test each chip and the interconnections among chips. However it requires the automatic test equipment to probe each chip pin and the increasing use of surface mounting techniques make it difficult to perform in-circuit test. Delay defects on I/O pads, interconnections of a board, or interconnections among embedded cores can not be tested with the current IEEE 1149.1 boundary scan design. This paper introduces a simple design technique which slightly modifies the TAP controller to test delay defects by postponing the UpdateDR with EXTEST instruction. Furthermore 2log(N+2) interconnect test patterns are proposed for both static and delay testing.
Did you find this white paper useful?
25 out of 50 users found this white paper useful
Related white papers
EIO vs. MIO: The Enhancements in Enhanced Input/Output Technology
Enhanced Input/Output (EIO) is the new general-purpose technology for Hewlett-Packard hard copy peripherals, replacing Modular I/O (MIO) present in earlier products. An I/O device provides a communication link between the...
Introduction to InfiniBand™
InfiniBand is a powerful new architecture designed to support I/O connectivity for the Internet infrastructure. InfiniBand is supported by all the major OEM server vendors as a means to expand beyond...
New DDR2 Memory Offers Advantages for Dual-Processor Servers
Technology innovation across platform subsystems is necessary to keep computing platforms in balance. DDR2 is the next logical progression for memory standards and speeds, and is considered one of most...
Touch Panel Technology Discussion
Touch screen applications are developing into a major display market niche as they ramp up their utilization of Liquid Crystal Display (LCD) flat panels into their designs. Touch technologies allow...
The Total Control® 1000 Multiservice Access Platform
This Web resource examines the market environment that has given rise to the need for powerful, high density platforms designed to support a wide array of new applications and services....
Neutral Wire Facts and Mythology
This technical paper discusses many common misunderstandings about the function of the neutral wire and its relation to power problems. The subjects of dedicated lines, phase reversal, isolation transformers, and...
A Generic Connection Framework for BREW
The paper tries to establish a common ground for I/O and network operations on BREW and encapsulate this commonality in a framework. Such a framework is used in J2ME to...
