| Publisher | University of Pittsburgh | ||
|---|---|---|---|
| Format | 34.5KB PDF, requires Acrobat Rdr 5 | Date added | 30 Dec 2000 |
| Topics | Processors | ||
| Downloads | 59 | ||
Low power consumption is one of the most important design constraints for modern computer systems. One promising technique to lowering power consumption of microprocessors is to reduce supply voltage and clock speed. By running at lower voltages and clock speeds, a quadratic savings in power can be achieved. This paper describes a technique for adjusting supply voltage and frequency at run-time to save energy. Our technique monitors a program’s instruction-level parallelism (ILP) and adjusts processor voltage and speed in response to the amount of observed ILP. The technique lets the user specify goal performance, which the hardware maintains while running at the lowest energy settings. In comparison to a processor running at a fixed voltage and speed, our approach improves energy consumption by an average of 47%.
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