| Publisher | Synplicity | ||
|---|---|---|---|
| Format | 351.2KB PDF, requires Acrobat Rdr 5 | Date added | 17 Mar 2004 |
| Topics | ASICs - Chip Sets | ||
| Downloads | 14 | ||
Synplicity's Synplify v. 5.1 and the new Synplify-Virtex mapper target all members of the Virtex series from the Xilinx XCV50ª device, with 50,000 system gates, to the Xilinx XCV1000ª one-million gate FPGA. The mapper produces results that efficiently use chip real estate while providing speeds of up to 160 MHz. As further devices are developed, reaching 2 million or more gates, Synplify will remain the synthesis tool that allows the designer to concentrate on creativity.
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